Gate Level and Transistor Level Parasitic Extraction

The parasitic effect on circuit performance becomes challenging in modern analog IC design. Empyrean RCExplorer™ supports both transistor-level and gate-level parasitic extraction. It provides both a 3D high-accuracy extraction mode and a 2.5D fast extraction mode.

Based on advanced technology such as fast resistance network extraction technology, partial differential equation solver technology, and parasitic capacitance extraction technology, RCExplorer can provide a fast and accurate parasitic extraction solution.

The Empyrean RCExploer™ solution enables designers to successfully evaluate and mitigate parasitic issues in their designs, ensuring improved performance and reliability.
 

Key Benefits
Highly Accurate Parasitic RC Extraction
 High Accuracy – Built-in fast and accurate 3D field solver, used for high-accuracy RC calculation
 High Efficiency – Real-time layout reliability analysis to provide convenient, fast, and accurate
         point-to-point RC analysis
 Seamless Integration – With Empyrean Aether™ LE and Empyrean Skipper^®