Empyrean Argus    

The increases in design scale and complexity lead to dramatically longer physical verification time. Therefore, a high efficient physical verification solution is needed. 

Empyrean Argus is a hierarchical and parallel physical verification tool for analog design. Its DRC and LVS function has been optimized for analog design’s layout. It improves the efficiency of layout analysis and debugging. Empyrean Argus can be seamlessly integrated into the schematic and layout editor.