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Layout Integration and Analysis

Empyrean Skipper

With the development of advanced processes and the increase of design complexity, the size of chips is getting much bigger. Some chips have an area of more than 400 square millimeters and more than 10 billions of transistors. That means higher requirements on the read/write performance, layout integration, query and operation for layout tools.

Empyrean Skipper is an efficient easy-to-use layout integration and analysis. Supported data formats include GDS, GDS.gz, OASIS, LEF/DEF, MEBES. Empyrean Skipper’s optimized algorithm and unique data structure enable faster chip integration and layout analysis. Empyrean Skipper also supports batch processing, net tracing and point-to-point resistance analysis. Essentially, Empyrean Skipper offers powerful chip-level layout analysis in a user-friendly environment.

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