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Complete Solution for Analog Design

Empyrean Technology provides a complete solution for analog IC design:

  • Empyrean Aether is a platform for analog IC design with capabilities such as schematic and layout editing and seamlessly integrated with SPICE simulator Empyrean ALPS, physical verification tool Empyrean Argus, parasitic RC extraction tool Empyrean RCExplorer and reliability analysis tool Empyrean Polas.
  • Empyrean ALPS is a high-performance parallel SPICE simulator. It’s an ideal solution for large-scale post-layout circuit simulation.
  • Empyrean ALPS-GT is a heterogeneous SPICE simulator using CPU and GPU for acceleration. It further improves post-layout circuit simulation and helps reduce design cycle.
  • Empyrean Argus is a physical verification tool that includes DRC and LVS. It can help improve verification quality and efficiency.
  • Empyrean RCExplorer supports transistor level and standard cell level post-layout extraction for analog designs. It also supports point-to-point RC analysis and timing delay analysis.
  • Empyrean Polas is a reliability analysis solution for Power IC design.
  • Empyrean Patron is a transistor-level power integrity analysis tool, which focuses on analog chip power integrity solutions. IC designers can perform comprehensive and reliable EM/IR analysis to sign-off the entire chip, with less learning effort and higher efficiency.

 

 

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